At present, many SOCs support an Inter-Integrated Circuit (I2C) bus interface and a General Purpose Input/Output (GPIO) interface at the same time. The I2C bus interface adopts an I2C bus data transmission protocol, and is a serial bus interface consisting of a Serial Clock (SCL) interface and a Serial Data (SDA) interface. The I2C bus interface transmits data between integrate circuits, and is implemented by using two pins of the SOC. The GPIO interface is usually used to transmit some simple control logic from the SOC to external devices or transmit some simple state from the external devices to the SOC, e.g. a chip selecting signal for external storage devices, and an enable signal for external display devices, etc., and the GPIO interface usually is implemented by using one pin.
When the I2C bus interface is implemented in the SOC, as shown in FIG. 1, a microprocessor, an I2C bus configuration register and a bidirectional PAD unit are included in the SOC. The microprocessor controls the I2C bus configuration register to perform I2C bus configuration on interfaces through the bidirectional PAD unit and transmit data. There is a pull-up resistor complying with the I2C bus protocol in the bidirectional PAD unit.
Specifically, the I2C bus interface may be configured according to the I2C bus protocol, and a sequence chart of the I2C bus protocol is shown in FIG. 2. As can be seen, there are three pieces of state information in data transmission process of the I2C bus to characterize the transmission process, which respectively are transmission START, transmission END and one byte transmission finish, and the three pieces of state information are implemented by cooperation of the SCL and SDA in the I2C bus. For the state information of the transmission START, when the SCL is at high level and the SDA jumps from high level to low level, data transmission starts; for the state information of the transmission END, when the SCL is at high level and the SDA jumps from low level to high level, data transmission ends; for an acknowledgement signal (ACK), after receiving 8 bits of data, an integrated circuit (IC) for receiving data sends a specific low level pulse to an IC for sending data to indicate that the data is received.
When the GPIO is implemented in the SOC, as shown in FIG. 3, a microprocessor, a GPIO configuration register are included in the SOC. The microprocessor controls the GPIO configuration register to configure an interface as a GPIO interface, and then data is transmitted through high level or low level.
Generally, different pins in the SOC are used to implement the I2C bus interface and the GPIO interface, thus the number of the interface pins in the SOC is large, and complexity and cost of the SOC applications are high.